Design and Evaluation of a Reliable TRNG using Probabilistic Switching Circuits

Abstract

On-chip true random number generator (TRNG) circuits are designed by harnessing physical random variations, such as thermal noise or supply noise, and are ideally expected to generate sequence of random bits with very high bit-entropy and zero correlation. However, increasing variations in the fabrication process and the sensitivity of transistors to operating conditions (e.g., process, voltage and temperature, (PVT)) have significant effect on the bit-entropy of TRNGs designed in deep nanometer technologies. Moreover, the process variation and operating conditions can be exploited by an adversary as effective tools to attack TRNGs. In order to mitigate these issues, we propose a probabilistic approach to design and analyze a TRNG by leveraging a probabilistic switching circuit based design paradigm. The basic component of our proposed TRNG is a probabilistic switch (pswitch). We use probabilistic complementary metal-oxide-semiconductor (PCMOS) inverter as the probabilistic switch in our design. The probabilistic switch is the source of entropy and is modeled as a Beta-Bernoulli process. We simulate our TRNG circuit using Dsch and Microwind simulator using $65\,nm$ and $32\,nm$ process technology. Results reveal that our proposed TRNG can generate random numbers with bit-entropy in the range $[0.998, 1]$ at data rate of $200$ Mbps. Moreover, simulation results indicates that our proposed TRNG is robust against the temperature, power supply, and fabrication process variations.